Interface traps build-up and its influence on electrostatic discharge robustness of high-power metal-oxide-semiconductor field-effect transistor

Objectives. The aim of the study is to confirm that the robustness of high-power metal–oxide–semiconductor fieldeffect transistor (MOSFET) to electrostatic discharge (ESD) after gamma irradiation is determined by the concentration of built-up interface traps (IT). The reason for such dependence is the degradation of the gain of the parasitic bipolar transistor in the structure of high-power MOSFETs during accumulation of IT. As a result, higher ESD pulse voltage is required to activate the parasitic bipolar transistor and cause the subsequent catastrophic failure of MOSFET.

Methods. The study describes the physical mechanism of the influence of IT accumulation on the robustness of highpower MOSFETs to ESD. Experimental studies included determination of ESD robustness for two types of highpower MOSFETs before irradiation, ⁶⁰Co gamma irradiation to several levels of total ionizing dose, and subsequent determination of the ESD robustness of irradiated samples.

Results. The study developed a method for calculating IT concentration and radiation-induced charge density from subthreshold drain-gate characteristics. It was also shown that for the first type of MOSFET, when irradiated to total ionizing dose level of 3 krad, the build-up IT did not occur, nor was any change or insignificant decrease in the breakdown voltage observed when exposed to ESD. For the second type of MOSFET, build-up IT was observed when irradiated to total ionizing dose level of 2 and 4 krad and an increase in the breakdown voltage was also observed when exposed to ESD.

Conclusions. The study shows the relationship between the IT concentration and the change in the breakdown voltage when exposed to ESD. The results obtained can be used to assess the failure-free operation time of devices operating under conditions of ionizing radiation and electrostatic discharges. 

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