mireabulletinRussian Technological JournalRussian Technological Journal2782-32102500-316XRTU MIREA10.32362/2500-316X-2026-14-2-80-102LLZOKJmireabulletin-1467Research ArticleМИКРО- И НАНОЭЛЕКТРОНИКА. ФИЗИКА КОНДЕНСИРОВАННОГО СОСТОЯНИЯMICRO- AND NANOELECTRONICS. CONDENSED MATTER PHYSICSФизически неклонируемые функции в цифровых интегральных схемахPhysically unclonable functions in digital integrated circuitshttps://orcid.org/0000-0001-6264-1231ПевцовЕ. Ф.PevtsovE. Ph.

Певцов Евгений Филиппович, к.т.н., директор структурного подразделения «Центр проектирования интегральных схем, устройств наноэлектроники и микросистем»

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Evgenii Ph. Pevtsov, Cand. Sci. (Eng.), Director of Center for the Design of Integrated Circuits, Nanoelectronics Devices and Microsystems

pevtsov@mirea.ruhttps://orcid.org/0000-0003-3519-6683ДеменковаТ. А.DemenkovaT. A.

Деменкова Татьяна Александровна, к.т.н., доцент, кафедра вычислительной техники, Институт информационных технологий

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Tatyana A. Demenkova, Cand. Sci. (Eng.), Associated Professor, Computer Technology Department, Institute of Information Technologies,

demenkova@mirea.ruhttps://orcid.org/0009-0000-3976-7872КоротаевЮ. А.KorotaevYu. A.

Коротаев Юрий Александрович, аспирант, кафедра наноэлектроники, Институт перспективных технологий и индустриального программирования

119454, Россия, Москва, пр-т Вернадского, д. 78

Yuri A. Korotaev, Postgraduate Student, Department of Nanoelectronics, Institute for Advanced Technologies and Industrial Programming

korotaevya@yandex.ruСиговА. С.SigovA. S.

Сигов Александр Сергеевич, академик Российской академии наук, д.ф.-м.н., профессор, президент

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Alexander S. Sigov, Academician at the Russian Academy of Sciences, Dr. Sci. (Phys.–Math.), Professor, President

sigov@mirea.ruMIREA – Russian Technological UniversityРоссияMIREA – Russian Technological UniversityRussian Federation20260904202614280102Copyright © Певцов Е.Ф., Деменкова Т.А., Коротаев Ю.А., Сигов А.С., 20262026Певцов Е.Ф., Деменкова Т.А., Коротаев Ю.А., Сигов А.С.Pevtsov E.P., Demenkova T.A., Korotaev Y.A., Sigov A.S.This work is licensed under a Creative Commons Attribution 4.0 License.https://www.rtj-mirea.ru/jour/article/view/1467Цели

Цели. Преимуществом модулей, реализующих физически неклонируемые функции (ФНФ) и встроенных в цифровой чип, является то, что отклики на запросы могут быть напрямую использованы другими приложениями устройства. Устройство способно запрашивать и считывать ФНФ без привлечения внешних инструментов и вывода запроса и ответа за пределы чипа. ФНФ может быть реализована с использованием технологических операций и компонентов, применяемых при изготовлении самого устройства. Статья является первой из двух обзорных публикаций, посвященных ФНФ как компонентам инфраструктуры аппаратной безопасности. Данная статья фокусируется на формальном описании ФНФ и их конструкциях, основанных на модулях памяти и анализе временных характеристик сигналов.

Методы

Методы. Использованы методы определения количественных показателей и признаков для формального описания ФНФ: вычислимость, уникальность, возможность реализации, сложность клонирования, защита от несанкционированного доступа.

Результаты

Результаты. Рассмотрены реализации ФНФ как физических устройств, обладающих уникальной сигнатурой. Предложена их классификация: ФНФ на основе временных характеристик сигналов, ФНФ на основе схем памяти и аналоговые ФНФ. Приведены наиболее типичные примеры реализаций первых двух типов. Показано, что решения на основе задержек сигналов обеспечивают широкое пространство пар «запрос – ответ», но требуют симметрии и/или калибровки, тогда как ФНФ на базе памяти проще реализуются в интегральных схемах и при корректной постобработке достигают высокой воспроизводимости, что делает их практичным выбором для многих приложений. Описаны подходы к компенсации влияния вариаций напряжения и температуры. Приведены примеры «сильных» память-ориентированных ФНФ и схемотехнические приемы повышения их стойкости к атакам.

Выводы

Выводы. Технология обеспечения безопасности на основе ФНФ обладает значительным потенциалом, особенно для применения в устройствах интернета вещей. Проведенный анализ показывает, что в сочетании с методами постобработки и компенсации эксплуатационных факторов ФНФ является зрелым инструментом обеспечения аппаратной безопасности.

Objectives

Objectives. Modules that implement physically unclonable functions (PUFs) within a digital chip facilitate the direct use of challenge–response pairs by device applications that can query and read the PUF without external tools or exposing data outside the chip. A PUF can be implemented using technological processes and components already applied in device fabrication. The first of two reviews on PUFs as elements of hardware security infrastructure, the present paper focuses on the formal description of PUFs and designs based on memory modules and timing analysis.

Methods

Methods. The following quantitative indicators were applied to formally describe PUFs: computability, uniqueness, feasibility, cloning resistance, and protection against unauthorized access.

Results

Results. PUFs are considered as physical devices with unique signatures. A classification into three PUF groups is proposed: delay-based, memory-based, and analog. Typical examples of the first two groups are outlined. While delay-based solutions provide a large challenge–response space, they require symmetry and/or calibration. In contrast, memory-based PUFs are easier to implement in integrated circuits. With suitable post-processing, they can achieve high reproducibility, making them practical for many applications. Approaches to mitigating voltage and temperature variations are described along with examples of strong memory-oriented PUFs and circuit techniques that enhance resistance to attacks.

Conclusions

Conclusions. PUF-based security technologies demonstrate significant potential, particularly for the Internet of Things. When combined with post-processing and compensation methods, PUFs constitute a mature and effective tool for hardware security.

физически неклонируемая функцияФНФинтегральные схемыаппаратная безопасностьФНФ типа «арбитр»ФНФ на основе памятиSRAMDRAMинтернет вещейphysically unclonable functionPUFintegrated circuitshardware securityarbiter PUFmemory-based PUFSRAMDRAMInternet of ThingsРабота выполнена при поддержке Министерства науки и высшего образования РФ (Государственное задание для университетов № FSFZ-2026-0003) и с применением оборудования Центра коллективного пользования РТУ МИРЭА (соглашение от 01.09.2021 № 075-15-2021-689, уникальный идентификационный номер 2296.61321X0010).This work was supported by the Ministry of Science and Higher Education of the Russian Federation (State task for universities No. FSFZ-2026-0003) and using the equipment of the Center for Collective Use of RTU MIREA (agreement dated September 01, 2021, No. 075-15-2021-689, unique identification number 2296.61321X0010).ReferencesKhalil K., Idris H., Idriss T., Bayoumi M. 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The authors declare that there are no conflicts of interest present.